This invention relates to the field of digital data communications and more particularly to multi-user digital data communication systems
An important performance parameter of digital computing systems for business applications is the cost per user. Since many typical business applications, such as word processing and record keeping, do not require significant amounts of processing time; the use of a system with a single digital processor connected to multiple users to provide the individual processing needs of each user can be more cost effective than other arrangements. A typical multi-user system for business application has a central processing unit, which acts as the system host, and a number of video display terminals, VDT's, as the multiple data entry points. The terminals are connected to the host by means of a digital data communication system.
In order for a multi-user system to be cost competitive with multiple single-user systems, the digital data communication system interconnecting the host computer with the user terminals must be inexpensive. Moreover, in order to keep operating expenses down, the digital data communication system must be capable of handling the data communication requirements of all of the multiple users without significantly burdening the terminal operators with time consuming communication procedures. Furthermore, to allow for the greatest number of users, the amount of host computation time required to operate the data communication system should be minimized.
The data communication system disclosed in U.S. Pat. No. 3,898,373, issued Aug. 5, 1975 to L. Walsh, has a serial bus system in which a two conductor cable connects the host computer in parallel to all the remote units, including VDT's. The two conductor cable between the units is one of the least expensive devices for interconnection, thus this portion of the design minimizes the cost per user of a multi-user system. However, the polling procedure used for accessing the two conductor, serial data bus and the complex digital circuit apparatus required to interface the various units to the two conductor serial data bus are both far from minimal with regard to central processor time consumed by the polling procedures, and with regard to the electronic hardware needed to form the interface circuits. Furthermore, in such a design as this, central processor time is needlessly occupied by polling units which do not have data to be communicated.
The digital data communication system disclosed in U.S. Pat. No. 4,063,220, issued Dec. 13, 1977 to R. Metcalfe et al., similarly has a serial data bus using a two conductor cable, but instead of central processor controlled polling, the bus connected units control themselves. This is achieved by having each interface unit monitor the data bus for a specific time period and if the bus is unused for a preset time period, a unit with data to communicate may then transmit via a data burst or a packet directed to a receiving unit. Those skilled in the art will recognize that this procedure leaves open the possibility of two or more units transmitting concurrently on the bus leading to a data communication interference. The interference problem is solved by R. Metcalfe et al. by having each interface monitor the bus while it is transmitting. Whenever the data received during transmission does not match the data transmitted, data transmission ceases and each previously transmitting interface circuit waits a randomly selected time period before beginning a subsequent monitor/transmit cycle.
It is evident that an interface circuit which includes a first storage register that stores the data transmitted from the unit, a second storage register that stores the data appearing on the data bus during transmission, comparative circuitry to determine if the data stored in these two registers are equivalent, and a random re-transmit time selector; has a high degree of complexity and a likewise high per unit expense. Thus, although this system does not needlessly occupy central processor time, as does the U.S. Pat. No. 3,898,373 discussed above, the alternative expense of providing the control procedure and control circuitry for the burst mode of data communication within each user interface is high.
Another digital data communication system disclosed in U.S. Pat. No. 4,281,380, issued Jul. 28, 1981 to N. DeMesa III et al., has a serial data bus which is operated in the burst or packet communication mode as the system shown in U.S. Pat. No. 4,063,220 discussed above. There are some differences in implementation however. This data communication system monitors a common `busy` bus line to determine if the bus is available, instead of monitoring the serial data communication lines, as is the practice of the previously discussed patent. Secondly, instead of monitoring the transmitted data communication for an interference condition, this system monitors the serial data bus for an acknowledge character from the receiving unit. Failure to receive an acknowledge character from the receiving unit is presumed to evince the occurrence of an interference condition. After a presumed interference condition, each unit, transmitting at that time, waits a respective period of time before re-attempting to access the `busy` line and subsequently transmit. Each respective waiting period is predetermined by the priority of the unit and is preselected to be sufficiently different from the others to prevent a second data interference condition between the two original units involved.
This system, although it is a better non-polling system than the system of U.S. Pat. No. 4,063,220 in some aspects, in others it is not. The assumption of an interference condition from non-receipt of an acknowledge character simplifies and reduces the storage register design requirements of the interface, but at the cost of a complex protocol, including a timer for timing the acknowledge message and the programmed wait period upon occurrence of an interference. These complex circuits and procedures will cause the cost of each interface circuit to be high.
Other patents providing background information concerning digital data communication systems are U.S. Pat. Nos. 4,593,283; 4,521,880; 4,494,113; 4,405,981; 4,387,425; 4,385,382; 4,365,294; 4,210,780; and 4,128,883. The article Ethernet: Distributed Packet Switching for Local Computer Networks by R. Metcalfe and D. Boggs, published in the Jul. 1976 issued of "Communications of the ACM", also provides background information on the subject of digital data communications.
It is an object of the present invention to provide a digital data communication system which uses standard single user digital data bus cabling and connectors, and by means of a simple interface circuit transforms the single user system into a multi-user digital data communications bus.
It is another object of the present invention to provide a digital data communication system which has a simple and effective procedure to access the data bus and to recover from data interferences.
It is a further object of the present invention to provide a non-prioritized, digital data communication system in which each user has exclusive use of the the digital data communication system between the respective user terminal and the host computer on a first-come-first-served basis until all data of the current digital data communication from the respective user terminal is complete.